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STM32F722RET6 datasheet, pinout

Explore the STM32F722RET6 Reference Manual and pinout details. This comprehensive guide provides essential information to help you efficiently utilize the STM32F722RET6 in your electronic projects.

Marken: STMicroelectronics

Herunterladen: STM32F722RET6 Datasheet PDF

Preis: Anfrage

Auf Lager: 28,524

Kernprozessor: ARM® Cortex®-M7

Kerngröße: 32-Bit-Einzelkern

Peripheriegeräte: Brown-Out-Erkennung/Reset, DMA, I²S, POR, PWM, WDT

Paket: 64-LQFP

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stm32f722ret6 pinout

1：Overview of the STM32F722RET6：

STM32F722RET6 is a high-performance microcontroller featuring an ARM Cortex-M7 core. It operates at a frequency of up to 216MHz, enabling rapid processing of complex data. The device includes 512KB of flash memory and 128KB of SRAM, providing ample storage and processing space.

The operating voltage range of the STM32F722RET6 is from 1.71V to 3.6V. It can operate within a temperature range of -40°C to 105°C, making the STM32F722RET6 suitable for harsh industrial environments. The STM32F722RET6 features multiple advanced timers and general-purpose timers.

Communication interfaces include serial port (USART), SPI interface, I²C interface and CAN interface, which can be used with a variety of external devices. STM32F722RET6 also supports a variety of low-power modes.

2：STM32F722RET6 alternate function mapping (continued)

Port	AF1	AF2	AF3	AF4	AF5	AF6	AF7	AF8	AF9	AF10	AF11	AF12	AF15
	TIM1/2	TIM3/4/5	TIM89V101 1/LPTIM1	12C1/2/3/U SART1	SPI1//2S1/ SPI21252 SPI3/12S3 SPI4/5	SPl2/282/ SP13/283/ SP13/283/ SAI1 UART4	SPI2/282/S P13/233/0S ART1/2/3/UA RT5	SAl2/USART 6/UART4/5/7/ 8/OTG₁_FS	CANI/TIM1 2/3/14/QU ADSPV FMC OTG2_HS	SAl2/QUAD SPLSDMM C2/OTG2 HS/OTG1_ FS	SDMMC2	UART7/F MC/SDM MC1/ OTG2_FS	SYS
PAO	TIM2_CH1 /TIM2_ET R	TIM5_CH1	TIM8_ETR				USART2_CTs	UART4_TX		SAI2_SD_B			EVEN TOUT
PA1	TIM2_CH2	TIM5_CH2					USART2_RTs	UART4_RX	QUADSPI_ BK1_103	SAI2_MCK_B			EVEN TOUT
PA2	TIM2_CH3	TIM5_CH3	TIM9_CH1				USART2_TX	SA2_SCK_B					EVEN TOUT
PA3	TIM2_CH4	TIM5_CH4	TIM9_CH2				USART2_RX			OTG_HS_U LPI_D0			EVEN TOUT
PA4					SPI1_NS8 /1281_wS	SPl3_NSS 1283_WS	USART2_CK					OTG_HS sOF	EVEN TOUT
PA5	TIM2_CH1 /TIM2_ET R		TIM8_CH1 N		SPI1_SCK A2S1_cK					OTG_HS_U LPI_CK			EVEN TOUT
PA6	TMNE	TIM3_CH1	TIM₈_BKIN		sP MS				TIM13_CH1				EVEN TOUT
PA7	TIMI CH	TIM3_CH2	TIM8_CH1 N		SPI1_MO SM281_s D				TIM14_CH1			FMC_SDN WE	EVEN TOUT
PAB	TIM₁_CH1		TIM8_BKIN 2	2C3_SCL			USART1_CK			oTGFss			EVEN TOUT
PA9	TIM1_CH2			2C3_SMBA	SPI2_SCK A282_CK		USART1_TX						EVEN TOUT
PA10	TIM1_CH3						USART1_RX			oTGS-			EVEN TOUT
PA11	TIM1_CH4						USART1_CTs		CAN1_RX	OTG_FS_D			EVEN TOUT
PA12	TIM1_ETR						USART1_RTs	SAl2_FS_B	CAN1_TX	OTG_FS_DP			EVEN TOUT
PA13													EVEN TOUT
PA14													EVEN TOUT
PA15	TIM2_CH1 /TIM2_ET R				SPI1_NSS 12S1_wS	SPl3_NSS 1283_WS		UART4_RTS					EVEN TOUT
PBO	TIM1_CH2 N	TIM3_CH3	TIM8_CH2 N					UART4_CTS		OTG_HS_U LPI_D1			EVEN TOUT
PB1	TIM1_CH3 N	TIM3_CH4	TIM8_CH3 N							OTG_HS_U LPI_D2			EVEN TOUT
PB2						SAl1_SD_A	SPI3_MOSMI 283_SD		QUADSPI_CLK				EVEN TOUT
PB3	TIM2_CH2				SPI1_SCK A2S1_CK	SPl3_SCK /283_CK				SDMMC2_D2			EVEN TOUT
PB4		TIM3_CH1			SPI1 MIS ō	SPI3_MIS ō	SPl2_NSS//2 S2_WS			SDMMC2 D3			EVEN TOUT
PB5		TIM3_CH2		2Ct SM	SPI₁_MO SMI2S1_S D	SP13_MO SM283_S D				TGHSU		FMC_SDCKE1	EVEN TOUT
PB6		TIM4_CH1		2C1_sCL			USART1_TX			QUADSPI BK1_NCS		FMC_SDNE1	EVEN TOUT
PB7		TIM4_CH2		12C1_SDA			USART1_RX					FMC_NL	EVEN TOUT
PB8		TIM4_CH3	TMto CH	2C1_SCL					CAN₁_RX	SDMMC2 D4		SDMMC1 _D4	EVEN TOUT
PB9		TIM4_CH4	TIM11_CH1	12C1_SDA	SPI2_NS8 /1282_WS				CAN1_TX	SDMMC2_D5		SDMMC _D5	EVEN TOUT
PB10	TIM2_CH3			2C2_SCL	SPI2_SCK A282_CK		USART3_TX			OTG_HS_U LPI_D3			EVEN TOUT
PB11	TIM2_CH4			12C2_SDA			USART3_RX			oTGHS			EVEN TOUT
PB12	TMNk			2C².SM	SPI2_NSS 1282_ws		USART3_CK			OTG_HS_U LPI_D5		OTGHS-	EVEN TOUT
PB13	TM CH				SPI2_ScK A2S2_CK		USART3 CTs			OTG_HS_U LPI_D6			EVEN TOUT
PB14	TMLCHa		TIM8_CH2 N		SPI2_MISo		USART3_RTs		TIM12_CH1	SDMMC2_D0		OTG_HS DM	EVEN TOUT
PB15	TMIH³		TIM8_CH3 N		SPl2_MO SV282_S D				TIM12_CH2	SDMMC2 D1		OTG_HS DP	EVEN TOUT
PCO								SAl2_FS_B		OTGHSU LPI_STP		FMC_SDN WE	EVEN TOUT
PC					SPl2_MO SV282_S D	SAISD-							EVEN TOUT
PC2					SPI2 MISO					OTG_HS_U LPI_DIR		FMC_SDNE0	EVEN TOUT
PC3					SPl2_MO SV1282_S D					OTG_HS_U LPI_NXT		FMC_SDCKEO	EVEN TOUT
PC4					281_MCK							FMC_SDNE0	EVEN TOUT
PC5												FMC_SDCKE0	EVEN TOUT
PC6		TIM3_CH1	TIM8_CH1		252_MCK			USART₆_TX		SDMMC2 D8		SDMMC1 _D6	EVEN TOUT
PC7		TIM3_CH2	TIM8_CH2			283_MCK		USART₆_RX		SDMMC2 D7		SDMMC1 _D7	EVEN TOUT
PC8		TIM3_CH3	TIM8_CH3				UART5_RTS	USART₆_CK				SDMMC1 _D0	EVEN TOUT
PC9		TIM3_CH4	TIM8_CH4	12C3_SDA	28_CKIN		UART5_CTS		QUADSPI_ BK1_100			SDMMC1 _D1	EVEN TOUT
PC10						SP13_SCK /283_CK	USART3_TX	UART4_TX	QUADSP BK1_101			SDMMC1 _D2	EVEN TOUT
PC11						SP13_MIS ō	USART3_RX	UART4_RX	QUADSP BK2_NCS			SDMMC1 _D3	EVEN TOUT
PC12						SP13_MO SM283_S D	USART3_CK	UART5_TX				SDMMC1 _CK	EVEN TOUT
PC13													EVEN TOUT
PC14													EVEN TOUT
PC15													EVEN TOUT
PD0									CAN₁_RX			FMC_D2	EVEN TOUT
PD1									CAN1_TX			FMC_D3	EVEN TOUT
PD2		TIM3_ETR						UART5_RX				SDMMC1 _CMD	EVEN TOUT
PD3					SPI2_SCK 282_CK		USART2_CT					FMC_CLK	EVEN TOUT
PD4							USART2_RTS					FMC NO	EVEN TOUT
PD5							USART2_TX					FuC Mw	EVEN TOUT
PD6					SP13_MO SM2S3_S D	SAt sD	USART2_RX				SDMMC2 _CK	FMC_NW AIT	EVEN TOUT
PD7							USART2_CK				SDMMC2 _CMD	FMC_NE1	EVEN TOUT
PD8							USART3_TX					FMC_D13	EVEN TOUT
PD9							USART3_RX					FMC_D14	EVEN TOUT
PD10							USART3_CK					FMC_D15	EVEN TOUT
PD11							USART3_CTs		QUADSPI_ BK1_00	SAI2_SD_A		FMC_A16 FMC_CLE	EVEN TOUT
PD12		TIM4_CH1	LPTM1_IN 1				USART3_RTs		QUADSPI_ BK1_101	SAl2_FS_A		FMC_A17/ FMC_ALE	EVEN TOUT
PD13		TIM4_CH2	LPTUM-						QUADSP BK1_03	SAP SCK		FMC_A18	EVEN TOUT
PD14		TIM4_CH3						UART8_CTS				FMC_D0	EVEN TOUT
PD15		TIM4_CH4						UART8_RTS				FMC_D1	EVEN TOUT
PEO		TIM4_ETR	LPTIM1_ETR					UART8_Rx		SA2_MCK_A		FMC_NBL 0	EVEN TOUT
PE1			LPTM₁_IN 2					UART₈_Tx				FMC NBL 1	EVEN TOUT
PE2					SPl4_SCK	SA1_MCLK_A			QUADSPI BK1_102			FMC_A23	EVEN TOUT
PE3						SAI sD						FMC_A19	EVEN TOUT
PE4					SPI4_NSS	SAIAFS-						FMC_A20	EVEN TOUT
PE5			TIM9_CH1		SP14_MISo	SAIt SCK						FMC_A21	EVEN TOUT
PE6	TIM1_BKIN2		TIM9_CH2		SP14_MOS	SAISD				SARMC		FMC_A22	EVEN TOUT
PE7	TIM₁_ETR							UART7_Rx		QUADSPI BK2_100		FMC_D4	EVEN TOUT
PE8	TMI CH							UART7_Tx		QUADSPI BK2_01		FMC_D5	EVEN TOUT
PE9	TIM1_CH1							UART7_RTS		QUADSPI_ BK2_102		FMC_D6	EVEN TOUT
PE10	TM CH²							UART7_CTS		QUADSPI_ BK2_103		FMC_D7	EVEN TOUT
PE11	TIM1_CH2				SPI4_NSS					SAI2_SD_B		FMC_D8	EVEN TOUT
PE12	TMI CH				SPl4_SCK					SAP SCK-		FMC_D9	EVEN TOUT
PE13	TIM₁_CH3				sP_MS					SAl2_FS_B		FMC_D10	EVEN TOUT
PE14	TIM1_CH4				SP14_MO SI					SAl2_MCK_B		FMC_D11	EVEN TOUT
PE15	TIM1_BKN											FMC_D12	EVEN TOUT
PFO				12C2_SDA								FMC_A0	EVEN TOUT
PF1				2C2_sCL								FMC_A1	EVEN TOUT
PF2				12C2_SMBA								FMC_A2	EVEN TOUT
PF3												FMC_A3	EVEN TOUT
PF4												FMC_A4	EVEN TOUT
PF5												FMC_A5	EVEN TOUT
PF6			TIM10_CH 1		SPI5_NSS	SA1 SD		UART7_Rx	QUADSPI_ BK1_103				EVEN TOUT
PF7			TM11_CH1		SPI5_SCK	SA1_MCLK_B		UART7_Tx	QUADSPI BK1_102				EVEN TOUT
PF8					SPI5_MISo	SAI1_SCK_B		UART7_RTS	TIM13_CH1	QUADSPI BK1_100			EVEN TOUT
PF9					SP15_MO SI	SAI FS		UART7_CTS	TIM14_CH1	QUADSPI BK1_01			EVEN TOUT
PF10													X
PF11					SP15_MO SI					SAI2_SD_B		FMC_SDN RAS	EVEN TOUT
PF12												FMC_A6	EVEN TOUT
PF13												FMC_A7	EVEN TOUT
PF14												FMC_A8	EVEN TOUT
PF15												FMC_A9	EVEN TOUT

STM32F722RET6 datasheet, pinout

stm32f722ret6 pinout

1：Overview of the STM32F722RET6：

2：STM32F722RET6 alternate function mapping (continued)

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